{"id":11479,"date":"2024-04-22T15:48:37","date_gmt":"2024-04-22T14:48:37","guid":{"rendered":"https:\/\/mathscitech.org\/articles\/?p=11479"},"modified":"2024-05-02T10:54:55","modified_gmt":"2024-05-02T09:54:55","slug":"tiny-language","status":"publish","type":"post","link":"https:\/\/mathscitech.org\/articles\/tiny-language","title":{"rendered":"A tiny high-level language runtime for embedded computing with the power of C and the extensibility of Forth or LISP."},"content":{"rendered":"<p><!-- Titles:\nBare-metal nano-computing for smart embedded designs: compilation with a complete kernel and runtime below 400 bytes!\n--><br \/>\nWe are delighted to announce the successful completion of a tiny footprint high-level computing language for high-speed, low-power, embedded computing on bare silicon (no BIOS, no OS).  In terms of size, cost, and carbon footprint, <strong>the kernel clocks in at 730 bytes<\/strong> which includes a fully extensible runtime kernel providing DSL (domain specific language) capability for application specific computing.<br \/>\n<!--more--><\/p>\n<p><strong>What has been achieved:<\/strong><\/p>\n<ol>\n<li>372 <strong>byte<\/strong> machine coded kernel (bytes, not KB).  This is small enough to fit into the smallest ROMs, while still leaving plenty of space for application RAM.<sup class='footnote'><a href='#fn-11479-1' id='fnref-11479-1' onclick='return fdfootnote_show(11479)'>1<\/a><\/sup>\n<li>A further 358 bytes comprise bootstrapped runtime instructions written in the language itself, and data organized in jump-tables for efficient threaded execution.\n<li>40 kernel level instructions provide the granular control of C for application code (bit-level, structured conditionals).\n<li>Compressed application code runs through a threaded design providing high speed code execution (as fast or faster than C) using native code.\n<li>The core kernel provides a codestream reader that provides <a href=\"https:\/\/mathscitech.org\/articles\/pol\">Domain specific language (DSL) capability<\/a> to allow first class language expansion with the full capability of a Forth or a Lisp.  This means expanded instructions have the same first-class attributes as the core kernel instructions.\n<li>Language is based on a simple stack-based virtual machine universal architecture onto which any chip can be mapped.\n<li>Portability between chips is achieved through a light-weight mapping layer to kernel instructions without requiring any other layer.  Mapping kernel instructions between chips and adapting the kernel code is all that is required to port to a new chip.\n<li>Any machine specific capabilities in a new chip can easily wrapped as a language extension, providing first class native code for high speed integration of full chip capabilities.\n<li>Lightweight development stack (open source) with compiler\/assembler\/debugger for cross-compilation.\n<li>Proof of concept designs with Arduino (Atmel 328), ATTiny85, and x86 chips.\n<li>User\/Programmer interface is via live serial link, via keyboard\/screen, or via binary ROM\/RAM load.\n<\/ol>\n<p>More details to follow.<\/p>\n<hr>\n<p>Recommended Reading:<\/p>\n<ol>\n<li><a href=\"https:\/\/mathscitech.org\/articles\/assembly-value\" rel=\"noopener\" target=\"_blank\">The sacred and the profane: low-level software engineering and the search for simplicity in the hardware-software combination<\/a>\n<li><a href=\"https:\/\/mathscitech.org\/articles\/tinyphoto\" rel=\"noopener\" target=\"_blank\">TinyPhoto: Embedded Graphics and Low-Fat Computing<\/a> &#8211; using the Atmel ATtiny85 and an early version of the tiny toolchain above.\n<li><a href=\"https:\/\/mathscitech.org\/articles\/knowledge-engineering\" rel=\"noopener\" target=\"_blank\">Knowledge Engineering &#038; Emerging Technologies (2005-2015)<\/a>*\n<li><a href=\"https:\/\/mathscitech.org\/articles\/sensor-systems\" rel=\"noopener\" target=\"_blank\">Sensors and Systems: Integrating Sensors into the Ubiquitous Computing Stack<\/a>\n<li><a href=\"https:\/\/mathscitech.org\/articles\/pol\" rel=\"noopener\" target=\"_blank\">Programming in a &#8216;Problem-Oriented (Domain Specific) Language&#8217;: Forth, Lisp, and Ruby<\/a>.\n<li><a href=\"https:\/\/mathscitech.org\/articles\/x86-assembly-toolset\" rel=\"noopener\" target=\"_blank\">Demystifying the Assembly Language Toolchain: DOS-DEBUG, NASM (Netwide Assembler), TCC (Tiny C Compiler), and Forth<\/a>\n<li><a href=\"https:\/\/mathscitech.org\/articles\/microcontrollers-nano\" rel=\"noopener\" target=\"_blank\">Microcontrollers, Sensors, and Embedded Systems: Low-Cost Experimenting with Arduino<\/a>\n<li><a href=\"https:\/\/mathscitech.org\/articles\/prog-micros\" rel=\"noopener\" target=\"_blank\">Programming Low-Power, Low-Cost Microcontrollers &#8211; Atmel, Arduino, ATtiny &#8211; A Homebrew Toolchain including a 3-instruction Forth<\/a>\n<li><a href=\"https:\/\/mathscitech.org\/articles\/talking-sensors\" rel=\"noopener\" target=\"_blank\">Voice Controlled Hardware and the Human-Sensor Interface<\/a>\n<\/ol>\n<hr>\n<h2>Footnotes:<\/h2>\n<div class='footnotes' id='footnotes-11479'>\n<div class='footnotedivider'><\/div>\n<ol>\n<li id='fn-11479-1'>  To put the small size into context, a block of code used to be 4096 bytes (4K), or about 6 pages of binary when viewed on an 80&#215;40 screen in standard 16 bytes per row format.  This about 20% of the size of a block, and is viewable in binary in just over 1 page (45 lines). <span class='footnotereverse'><a href='#fnref-11479-1'>&#8617;<\/a><\/span><\/li>\n<\/ol>\n<\/div>\n","protected":false},"excerpt":{"rendered":"<p> We are delighted to announce the successful completion of a tiny footprint high-level computing language for high-speed, low-power, embedded computing on bare silicon (no BIOS, no OS). In terms of size, cost, and carbon footprint, the kernel clocks in at 730 bytes which includes a fully extensible runtime kernel providing DSL (domain specific language) [Read More&#8230;]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":true,"template":"","format":"standard","meta":{"nf_dc_page":"","footnotes":""},"categories":[192,193,132,120,12],"tags":[223,222,221,220,42],"coauthors":[112],"class_list":["post-11479","post","type-post","status-publish","format-standard","hentry","category-building-technology","category-computing","category-electronics","category-software-engineering","category-technology","tag-assembler","tag-compiler","tag-low-power","tag-release","tag-ubiquitous-computing","odd"],"views":1651,"_links":{"self":[{"href":"https:\/\/mathscitech.org\/articles\/wp-json\/wp\/v2\/posts\/11479","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/mathscitech.org\/articles\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/mathscitech.org\/articles\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/mathscitech.org\/articles\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/mathscitech.org\/articles\/wp-json\/wp\/v2\/comments?post=11479"}],"version-history":[{"count":36,"href":"https:\/\/mathscitech.org\/articles\/wp-json\/wp\/v2\/posts\/11479\/revisions"}],"predecessor-version":[{"id":11547,"href":"https:\/\/mathscitech.org\/articles\/wp-json\/wp\/v2\/posts\/11479\/revisions\/11547"}],"wp:attachment":[{"href":"https:\/\/mathscitech.org\/articles\/wp-json\/wp\/v2\/media?parent=11479"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/mathscitech.org\/articles\/wp-json\/wp\/v2\/categories?post=11479"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/mathscitech.org\/articles\/wp-json\/wp\/v2\/tags?post=11479"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/mathscitech.org\/articles\/wp-json\/wp\/v2\/coauthors?post=11479"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}