Pleased to announce the successful completion of a tiny high-level computing language for high-speed, low-power, embedded computing on bare silicon (no BIOS, no OS). In terms of size, cost, and carbon footprint, the kernel clocks in at 730 bytes which includes a fully extensible runtime kernel providing DSL (domain specific language) capability for application specific computing.
What has been achieved:
- 372 byte machine coded kernel (yes, this is bytes, not KB, MB or GB). This is small enough to fit into the smallest ROMs, while still leaving plenty of space for application RAM.
- A further 358 bytes comprise bootstrapped runtime instructions written in the language itself, and data organized in jump-tables for efficient threaded execution.
- 40 kernel level instructions provide the full expressibility of C for application code.
- Compressed application code runs through a threaded design providing high speed code execution (as fast or faster than C) using native code.
- The core kernel provides a codestream reader that provides Domain specific language (DSL) capability to allow first class language expansion with the full capability of a Forth or a Lisp. This means expanded instructions have the same first-class attributes as the core kernel instructions.
- Language is based on a simple stack-based virtual machine universal architecture onto which any chip can be mapped. Proof of concept designs with Arduino (Atmel 328), ATTiny85, and x86 chips.
- Portability between chips is achieved through a light-weight mapping layer to the 40 kernel instructions without requiring any other layer. A single afternoon mapping the 40 kernel instructions between chips and adapting the kernel code is all that is required to port to a new chip.
- Lightweight development stack (open source) with compiler/assembler/debugger for cross-compilation.
- User/Programmer interface is via live serial link, via keyboard/screen, or via binary ROM/RAM load.
More details to follow.
If you haven’t done so already, you may want to start by reading the Preface to Knowledge Engineering & Emerging Technologies.
January 31st, 2024 (4th ed)
The aim of this article is to encourage you to take an end-to-end perspective in your designs, seeking to minimize the overall complexity of your system, of the hardware-software-user combination. To achieve this, it is helpful to understand how computing, and within that, how the notions of the sacred and the profane have evolved over the past 60 or so years.
The following remarks set out a ‘true north’ perspective for this conversation:
- “We are reaching the stage of development where each new generation of participants is unaware both of their overall technological ancestry and the history of the development of their speciality, and have no past to build upon.” – J.A.N. Lee, [Lee, 1996, p.54].
- “Any [one] can make things bigger, more complex. It takes a touch of genius, and a lot of courage, to move in the opposite direction.” – Ernst F. Schumacher, 1973, from “Small is Beautiful: A Study of Economics As If People Mattered”.
- “The goal [is] simple: to minimize the complexity of the hardware-software combination. [Apart from] some lip service perhaps, no-one is trying to minimize the complexity of anything and that is of great concern to me.” – Chuck Moore, [Moore, 1999] (For a succinct introduction to Chuck Moore’s minimalism, see Less is Moore by Sam Gentle, [Gentle, 2015]
- “The arc of change is long, but it bends towards simplicity”, paraphrasing Martin Luther King.
The discussion requires a familiarity with lower-level computing, i.e. computing that is close to the underlying hardware. If you already have some familiarity with this, you can jump straight in to section 2. For all backgrounds, the discussions in the Interlude (section 4) make for especially enlightening reading. Whether you find yourself in violent agreement or disagreement, your perspective is welcomed in the comments!
 Between complexity and simplicity, progress, and new layers of abstraction. Continue reading this article…
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